Information processing appliances and, further in recent years, household electric appliances, such as television sets and refrigerators, include CPUs and realize advanced operating control by software. The appliances store (firmware) programs for the operating control and parameters in ROMs. Semiconductor memory apparatuses that include flash memory devices are extensively used as the ROMs. In addition, the semiconductor memory apparatuses are extensively used in portable information processing appliances (mobile appliances), such as notebook computers, personal digital assistants (PDA), digital cameras, portable audio players, and cellular phones, as external, miniature recording media like memory cards. Especially for the uses, it is desirable that the semiconductor memory apparatuses have large capacities and small sizes.
The storage area of a flash memory device is generally divided into a plurality of pages each having a fixed number of memory cells. Writing and reading of data are performed page by page. The storage area is further divided into a plurality of blocks each having a fixed number of the pages. A data erasing is performed collectively in each of the blocks. Accordingly, page-by-page overwriting of data cannot be performed in the strict sense in the flash memory device, in contrast to RAMs.
A conventional semiconductor memory apparatus realizes a renewal of data stored in some pages of flash memory devices (which is hereafter referred to as a renewal of pages) and a writing of new data onto blank pages (which is hereafter referred to as an addition of pages), for example, as follows. FIG. 9 is an illustration of the renewal or addition of pages in one block of a flash memory 1 by the conventional semiconductor memory apparatus.
The conventional semiconductor memory apparatus comprises the flash memory 1 and two RAMs; a saving buffer 20 and a page buffer 2. The flash memory 1 is divided into more than one block B0, B1, . . . A physical address is allocated to each of the blocks B0, B1, . . . Each of the blocks includes 32 pages. For example, the head block (or the first block) B0 includes pages P0, P1, . . . , and P31, and the (n+1)th block Bn (n≧1) includes pages Q0, Q1, . . . , and Q31. A page in the block is identified by the pair of the physical address of the block and a page number in the block. The page numbers are, for example, serial numbers 0-31 put on the respective pages of the block from its top page in sequence. The saving buffer 20 and the page buffer 2 each have a storage capacity substantially equal to that of one page of the flash memory 1.
A host sends out a logical address designating a write target page and data objects to be written, to the semiconductor memory apparatus. The semiconductor memory apparatus stores the data objects DN in the page buffer 2. On the other hand, the semiconductor memory apparatus identifies the corresponding page in the flash memory 1 from the logical address. For example, when the logical address designates the (p+1)th page Pp (0≦p≦31) of the head block B0, the semiconductor memory apparatus converts the logical address into the pair of the physical address of the head block B0 and the page number p of the (p+1)th page Pp. The physical address is identified as the physical address of a block being a source of data transfer (which is hereafter referred to as a source block). Then, the semiconductor memory apparatus selects, in the flash memory 1, one block in which data has not yet been written (which is hereafter referred to as a blank block). The semiconductor memory apparatus selects, for example, the (n+1)th block Bn being the blank block. The physical address of the (n+1)th block Bn is identified as a physical address of the block to which the data stored in the source block B0 is transferred (which is hereafter referred to as a destination block).
The conventional semiconductor memory apparatus transfers data items stored in the source block B0 to the destination block Bn as follows. First, the data item D0 of the top page P0 of the source block B0 is read into the saving buffer 20 (see the arrow R0 shown in FIG. 9.) Next, the data item D0 of the saving buffer 20 is written onto the top page Q0 of the destination block Bn (see the arrow WO shown in FIG. 9.) Then, the data item D1 of the second page P1 of the source block B0 is read into the saving buffer 20 (see the arrow R1 shown in FIG. 9.) Next, the data item D1 of the saving buffer 20 is written onto the second page Q1 of the destination block Bn (see the arrow W1 shown in FIG. 9.) Such a data transfer via the saving buffer 20 is repeated the same number of times as the page number p of the write target page (the (p+1)th page Pp of the source block B0) (=p times). When the write target page (the (p+1)th page) Pp of the source block B0 is set as the source page of data reading, the semiconductor memory apparatus skips the data transfer to the saving buffer 20 for the page. Instead, the data object DN to be written, which is stored in the page buffer 2. is written onto the (p+1)th page Qp of the destination block Bn (see the arrow Wp shown in FIG. 9.) The data transfer via the saving buffer 20 is again repeated from the page next to the write target page Pp (the (p+2)th page) of the source block B0. The data item D31 of the bottom page P31 of the source block B0 is written onto the bottom page Q31 of the destination block Bn via the saving buffer 20 (see the arrows R31 and W31 shown in FIG. 9.) The semiconductor memory apparatus brings the logical address corresponding to the physical address of the source block B0 into correspondence with the physical address of the destination block Bn. The data item on the (p+1)th page Pp having the page number p is rewritten in the destination block Bn, in contrast to the source block B0. Thus, the conventional semiconductor memory apparatus realizes the renewal and addition of pages for one block of the flash memory 1.
Semiconductor memory apparatuses are required to have large capacities and small Sizes as far as possible. However, improvements in packing density of the flash memory devices are not easy. Accordingly, size reductions of circuit parts except the flash memory devices are desirable. For example, when many functional sections each include common circuit parts, the common parts are to be integrated into a single part. Thereby, reductions in number of the common parts are desirable. Size reductions of the semiconductor memory apparatuses are more desirable since they reduce the costs of manufacturing through the reductions in area of chips. The conventional semiconductor memory apparatus has the two RAMs, the saving buffer and the page buffer, as described above. The RAMs share the commonalities, being used as a buffer memory and having the substantially same storage capacity as that of one page of the flash memory device. Accordingly, the integration of the saving buffer and the page buffer into one RAM is strongly desirable. In the renewal of pages by the conventional semiconductor memory apparatus, however, the page buffer has to hold data objects to be written until the write target page is set as a target of saving, as described above. Therefore, it is difficult that the page buffer doubles as the saving buffer.